Myths Programmers Believe about CPU Caches
software.rajivprab.com·21h·
Discuss: Hacker News
Cache Coherence
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Wireless Sensor Networks as Parallel and Distributed Hardware Platform for Artificial Neural Networks
arxiv.org·18h
📊Quantization
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Well-Typed.Com: Case Study: Debugging a Haskell space leak
well-typed.com·22h
🔓Decompilation
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My first fifteen compilers (2019)
blog.sigplan.org·1h·
Discuss: Hacker News
🏗️Compiler Archaeology
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From Bottleneck to Breakthrough: AI in Chip Verification
spectrum.ieee.org·1d
🔧Hardware Verification
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A hitchhiker's guide to CUDA programming
seanzhang.me·1d·
Discuss: Hacker News
SIMD Vectorization
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Stochastic computing
scottlocklin.wordpress.com·5h
🏴󠁧󠁢󠁳󠁣󠁴󠁿Scottish Computing
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Building Up And Sanding Down
endler.dev·22h
🔩Systems Programming
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How We Saved 70% of CPU and 60% of Memory in Refinery’s Go Code, No Rust Required.
honeycomb.io·21h·
📊Performance Profiling
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Opportunistically Parallel Lambda Calculus
dl.acm.org·1d·
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🔗Functional Compilers
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Advanced 3D IC Heterogeneous Integration Analysis via Bayesian Optimization and AI-Driven Defect Mapping
dev.to·5h·
Discuss: DEV
🔧Hardware Verification
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How fast can an LLM go?
fergusfinn.com·1d·
Discuss: Hacker News
🎯Emulator Accuracy
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PVE 3-node cluster build using P330 Tiny - 64GB memory pricing question
reddit.com·2h·
Discuss: r/homelab
🖥️Hardware Architecture
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Technology Short Take 189
blog.scottlowe.org·9h
🏠Homelab Archaeology
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Libevpl – event loop engine with unified abstractions for network and block I/O
github.com·1d·
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🌊Streaming Systems
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Challenging the Fastest OSS Workflow Engine
obeli.sk·13h·
🔄Sync Engine
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Everything About Transformers
krupadave.com·1d
📝Text Parsing
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Strix Halo's Memory Subsystem: Tackling iGPU Challenges
chipsandcheese.com·18m·
Discuss: Hacker News
🖥️Modern CPU
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Interfacing assembly with BASIC via DEFUSR, part 7
subethasoftware.com·1d
🔧RISC-V Assembler
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