LLMs on a Shoestring: The Dynamic Cache Advantage by Arvind Sundararajan
dev.to·9h·
Discuss: DEV
💨Cache Optimization
The future of microoptimization
goldenstack.net·2d·
Discuss: Hacker News
🧮Compute Optimization
Intel's new Core i5-110 appears identical to a 2020 Comet Lake chip
techspot.com·20m
🖥️Modern CPU
Semantic Dictionary Encoding
falvotech.com·4h·
Discuss: Hacker News
🌀Brotli Dictionary
Topological Sort: Managing Mutable Structures in Haskell
mmhaskell.com·10h
🔗Topological Sorting
A Breadboard Computer in Three Chips
hackaday.com·2d
🖥️Hardware Architecture
Review: SpikingBrain Technical Spiking Brain-Inspired Large Models
arxiviq.substack.com·2d·
Discuss: Substack
🖥️Hardware Architecture
What is Algebraic about Algebraic Effects?
interjectedfuture.com·2h
Algebraic Effects
Condor Technology To Fly “Cuzco” RISC-V CPU Into The Datacenter
nextplatform.com·2h·
Discuss: Hacker News
🧩RISC-V
SK Hynix manufactures HBM4 stacks with over 2 TByte/s in series production
heise.de·1d
Nordic Processors
Ubuntu 25.10's Rust Coreutils Transition Has Uncovered Performance Shortcomings
phoronix.com·7h
🔩Systems Programming
Spiking Networks Find the Fastest Route: A New Era for AI
dev.to·2h·
Discuss: DEV
🔲Cellular Automata
Back from Open Source Summit Europe 2025: talks from Bootlin
bootlin.com·9h
⚙️Operating System Design
Microservices vs Monolith: A Complete Architecture Guide for Modern Software Development
blog.devops.dev·4h
🖥️Self-hosted Infrastructure
LAVa: Layer-wise KV Cache Eviction with Dynamic Budget Allocation
arxiv.org·15h
💻Local LLMs
Building a Simple Stack-Based Virtual Machine in Go
blog.phakorn.com·12h·
🔧RISC-V Assembler
Writing an operating system kernel from scratch
popovicu.com·2d·
⚙️Operating System Design
Google Summer of Code 2025 Reports: Enhancing Support for NAT64 Protocol Translation in NetBSD
blog.netbsd.org·2h
📝ABNF Parsing
H100 PCIe – 1.86 TB/s memcpy roofline and 8× uplift
news.ycombinator.com·1d·
Discuss: Hacker News
Cache Coherence